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rev.1.1, may.21.2004, page 1 of 17 M63160J stepping motor driver rej03f0038-0110z rev.1.1 may.21.2004 description this semiconductor integrated circuit includes for h bridge circuit for stepper motor drive.output transistor is dmos. motor power supply;is possible to drive until 52v maximum. function outline 1. maximum output current : peak 2.0a 2. low output ?s ron.: 1.1 ? 3. includes two stepping motor driver circuit * two dc motor and one stepping motor possible to drive. 4. motor control by serial interface.(frequency=20mhz maximum) 5. includes 5v- switching regulator. 6. includes thermal shut down circuit pin configuration pin configuration(top viw) 44 pin plcc outline 44 pin plcc b1 st 2 29 data12 30 en1 31 ctl1 32 ctl2 33 ground 34 ground 35 ctl34 36 en2 37 data34 38 stb34 39 28 27 26 25 24 23 22 21 20 19 18 clk12 vp1 out1b rs1 out1a ground ground out2a rs2 out2b v p2 28 27 26 25 24 23 22 21 20 19 18 17 nc 16 reset 15 exclk 14 (tmon) 13 vout 12 ground 11 ground 10 fb 9 vboot 8cp2 7cp1 40 41 42 43 44 1 2 3 4 5 6 clk34 vp4 out4b rs4 out4a ground ground out3a rs3 out3b vp3
M63160J rev.1.1, may.21.2004, page 2 of 17 block diagram gnd cp1 vboost rs2 out2a out2b gate-drive current sense control logic gate-drive rs1 gate-drive control logic gate-drive current sense reference amp out1a out1b serial i/f stb12 clk12 data12 control logic vout switching regulator 42v->5v rs4 gate-drive current sense control logic gate-drive rs3 gate-drive control logic gate-drive current sense vp4 out3b vp3 reference anp serial i/f control logic vcc 1/5 1/5 reference amp 1/5 stb34 clk34 data34 d/a d/a d/a 9 vboot 7 8 25 29 28 30 31 37 5 6 4 39 40 38 10 13 14 43 41 44 42 15 33 20 19 18 21 26 27 24 ( vp3) temp tmon d/a 16 10uf 0.01uf 0.22uf 0.1uf 0.22uf vp1 vp2 vp cp2 ctl1 32 ctl2 exclk en1 en2 reset out4b out4a out3a 3 ctl34 36 schottky diode 330uh fb 470uf (1,2,11,12,22,23,34,35) *rs resistance is setting up in the limits which does not exceed iout max.
M63160J rev.1.1, may.21.2004, page 3 of 17 pin function terminal symbol terminal function terminal symbol terminal function 1 ground gnd 23 ground gnd 2 ground gnd 24 out1a motor drive output1a 3 out3a motor drive output3a 25 rs1 current sense 1 4 rs3 current sense 3 26 out1b motor drive output1b 5 out3b motor drive output3b 27 vp1 motor power supply 1 6 vp3 motor power supply 3 28 clk12 clock in terminal 12 7 cp1 coupling capacitor1 29 stb12 stand by mode select 12 8 cp2 coupling capacitor2 30 data12 data input terminal 12 9 vboot bootstrap voltage 31 en1 enable 1 10 fb feed back 32 ctl1 reference control 1 11 ground gnd 33 ctl2 reference control 2 12 ground gnd 34 ground gnd 13 vout voltage output 35 ground gnd 14 (tmon) temperature monitor 36 ctl34 reference control 34 15 exclk external input terminal 37 en2 enable 2 16 reset reset 38 data34 data input terminal 34 17 nc no contact 39 stb34 stand by mode select 34 18 vp2 motor power supply 2 40 clk34 clock in terminal 34 19 out2b motor drive output2b 41 vp4 motor power supply 4 20 rs2 current sense 2 42 out4b motor drive output4b 21 out2a motor drive output2a 43 rs4 current sense 4 22 ground gnd 44 out4a motor drive output4a absolute maximam rating symbol parameter conditions rating unit vboot bootstrap voltage 65 v vp motor power supply 52 v vcc power supply 6.5 v iout motor output current 2.0 a vin input voltage of terminals -0.3 to 6.5 v pt power dissipation ta=25c, grass epoxy board base 2.5w w k thermal dissipation ta=25c, grass epoxy board base 40 c/w tj junction temperature 150 c topr movement circumference temperature -20 to 75 c tstg storage temperature -40 to 125 c
M63160J rev.1.1, may.21.2004, page 4 of 17 recommended operating conditions (ta =25c) limits symbol parameter minimum typcal maxmum unit vboot bootstrap voltage ? 52.6 61.2 v vref control voltage 0.1 2.5 2.9 v vp motor power supply 19.0 ? 46.2 v * iout motor current supply ? 1.2 1.5 a extclk extclk input frequency 1.8 4.0 6.1 mhz * junction temperature at 150c within logic input terminal symbol condition stb pull down clk pull down data pull down en1 pull down en2 pull down reset pull down
M63160J rev.1.1, may.21.2004, page 5 of 17 electrical characteristics (ta=25c, vp=42v unless otherwise noted) limits symbol parameter conditions minimum typcal maxmum unit common block icc-l vcc standby current vcc=5v, circuit current of motor stopping ? 5.5 7 ma im-l motor stop current vp=42v, circuit current of motor stopping ? 6.0 7.5 ma vboot bootstrap voltage ? 52.6 61.2 v fcp1 bootstrap frequency 150 200 250 khz lvoldl regulator voltage detector the case of supply voltage decreasing ? lvoldh -vhys ? v lvoldh regulator voltage detector the case of supply voltage increasing 4.18 4.4 4.62 v vhys vhys 180 200 220 mv tmon tmon voltage ta=25c 710 740 770 mv [power block] ron1 output rds(on) total of top and bottom (ta=25c) ? 1.1 1.4 ? ron2 output rds(on) total of top and bottom (ta=25c) ? 1.1 1.4 ? [logic input terminal] vinh serial port input voltage high 2 ? regout v vinl serial port input voltage low 0 ? 0.8 v iinh serial port input current high v force:5v 50 100 200 a iinl serial port input current low v force:0v -10 0 +10 a [serial port] fsclk serial port clock frequency clk12, clk34 ? ? 20 mhz tset serial port setup time 12.5 ? ? ns thold serial port hold time 10 ? ? ns [switching regulator] regout1 5v regulator output voltage1 load current :300ma vp voltage :10v to 47v 4.75 5.00 5.25 v fclk-reg clock frequency 75 100 125 khz rds(on)- reg sw.reg.-on ? 0.7 ? ? sfts soft start 5 10 15 ms climit output limits voltage load current : 600ma to 1.2a ? 4.75 ? v climit cut of fb voltage 0.8 1.2 1.5 a iout reg output current ? 300 500 ma effi1 efficiency (design value) vp=42v l=330uh c=470 f iout=300ma ? 70 ? % effi2 efficiency (design value) vp=15 vl=330uh c=470 f iout=300ma ? 80 ? %
M63160J rev.1.1, may.21.2004, page 6 of 17 (ta=25c, vp=42v unless otherwise noted) limits symbol parameter conditions minimum typcal maxmum unit iout=1a 50% to 90% pwm change to source on 200 500 800 pwm change to source off 50 100 200 pwm change to sink on 200 500 800 pwm change to sink off 50 100 200 phase change to source on 200 500 800 phase change to source off 50 100 200 phase change to sink on 200 500 800 exdt external pwm delay time phase change to sink off 50 100 200 ns svol1 sense voltage1 current ratio 100% vref(ctl)=2.0v 384 400 416 mv svol2 sense voltage2 current ratio 26.08% vref(ctl)=2.0v 93 104 115 mv ictl control input current ctl?gnd current 0.5 3 5 a thermal characteristics function start temperature of ic symbol parameter minimum typcal maxmum unit tsd thermal shut down ? 165 ? c ? hys tsd hys 35 c limits symbol parameter conditions minimum typcal maxmum unit motor block [power block] ron1-125 output rds(on) total of top and bottom (ta=125c) ? 1.65 2.0 ? ron2-125 output rds(on) total of top and bottom ? 1.65 2.0 ? ? tmon tmon -1.90 -1.72 -1.55 mv/c
M63160J rev.1.1, may.21.2004, page 7 of 17 switching regulator explanation 1. when using it usually through a switching regulator it is as a 2/15- page block diagram between vout and fb terminal. please connect a coil capacitor diode . 2. when s/w- reg is not used but voltage is given to a direct fb terminal from the exterior a coil capacitor diode is unnecessary. protection function when voltage is given to a direct fb terminal from the exterior, current can decrease by about 1ma at the time of vp standby. vout terminal 1. it has the gnd short protection function at the time of starting.l 2. it does not have the gnd short protection function under operation. fb terminal 1. the gnd short protection function at the time of starting serves as only a current limit. 2. during operation, it has the function to make vout turn off by combined use of current limit detection and a low voltage detection machine. sequence of operation at the time of starting. usually, a state: power supply injection with no gnd short vout-fb and charge pump operation gnd short state: power supply injection gnd short vout-fb un-operating charge pump operation sequence during operation. vout gnd short: vout operation gnd short judging vout-fb and charge pump operation fb gnd short: fb operation current limit operation gnd short judging vout-fb off. charge pump operation when fb voltage becomes less than [more than 1us4.2v] by current limit detection it becomes a gnd short judging and vout ismade to turn off. *1 gnd short detection function: gnd short detection performs gnd short detection at the time of starting, it does not have the gnd short detection function under operation.
M63160J rev.1.1, may.21.2004, page 8 of 17 a sequence of operation interception 10ms 9.3v interception release detection release soft start completion gnd short generating lowvoltagedetection interception gnd short protection operation lvoldl:4.2v lvoldh: 4.4v power supply reg ou tput soft start, completion signal low voltage detected signal output interception signal gnd sh ort factor
M63160J rev.1.1, may.21.2004, page 9 of 17 function setup (all initial value is 0, at tsd it is all 0) reset initialization = "h" ch1: out1 out2 out1,2 d0 blank time lsb blank time lsb out 2 internal pwm mode d1 blank time msb blank time msb out2 external pwm mode d2 off time lsb off time lsb out 2 phase d3 off time bit1 off time bit1 out 2 dac lsb d4 off time bit2 off time bit2 out 2 dac bit 2 d5 off time bit3 off time bit3 out 2 dac bit 3 d6 off time msb off time msb out 2 dac bit msb d7 fast decay time bit lsb fast decay time bit lsb out 1 internal pwm mode d8 fast decay time bit 1 fast decay time bit 1 out 1 external pwm mode d9 fast decay time bit 2 fast decay time bit 2 out 1 phase d10 fast decay time msb fast decay time msb out 1 dac lsb d11 sync.rect.control sync.rect.control out 1 dac bit 2 d12 sync.rect.enable sync.rect.enable out 1 dac bit 3 d13 don?t care don?t care out 1 dac bit msb d14 word select 0=0 word select 0=1 word select 0=0 d15 word select 1=0 word select 1=0 word select 1=1 ch2: out3,4 for test out3,4 d0 blank time lsb for test out 4 internal pwm mode d1 blank time msb for test don?t care d2 off time lsb for test out 4 phase d3 off time bit1 for test out 4 dac lsb d4 off time bit2 for test out 4 dac bit 2 d5 off time bit3 for test out 4 dac bit 3 d6 off time msb for test out 4 dac bit msb d7 fast decay time bit lsb for test out 3 internal pwm mode d8 fast decay time bit 1 for test don?t care d9 fast decay time bit 2 for test out 3 phase d10 fast decay time msb for test out 3 dac lsb d11 sync.rect.control for test out 3 dac bit 2 d12 sync.rect.enable for test out 3 dac bit 3 d13 don?t care for test out 3 dac bit msb d14 word select 0=0 word select 0=1 word select 0=0 d15 word select 1=0 word select 1=0 word select 1=1 * reset early condition = ?h?
M63160J rev.1.1, may.21.2004, page 10 of 17 serial port write timing reset h stb clk data 50ns 25ns 25ns 12.5ns d15 d14 50ns 50ns 50ns 10ns d0 * reset terminal ? l ? :serial data all reset
M63160J rev.1.1, may.21.2004, page 11 of 17 a motor control logic condition and explanation 1, data setup 1-1, data taking in: clk rising edge 1-2, data input 1: it carries out in order of d15 - >d0. 1-3, data input 2: a mode setup is performed after initial setting. 1-4, every 16 bits, it is a stb signal and it is closed. 1-5, a data setup of ch2 for test is not performed. 1-6, sync.rect.control ?active? at the time of a setup, the inside of fast decay performs negative voltage detection. fet is set to all off when current flows in the right direction. 2, reset terminal low: all data reset(all fet off)high :data setup standby state when a reset terminal is set to ?l? and a motor drive is performed, a rest terminal is set to ?h? and serial data is re inputted. internal logic reset is logic composition of a reset terminal and a low voltage detection machine is performed. when rapid high load is in fb, a low voltage detection machine outputs ?l?, internal logic is reset when an output does not return to less than 1 s at ?h.? reset terminal ?l? ? internal logic will be in an initial state.(all fet serves as all off ) ? a s/w- reg part continues operation. 3, en terminal low: external pwm mode slow decay or fast decay off time ? fast decay time: sleep a current detection condition setup at the time of decay is performed by sync.rect.control active or passive. however, current detection is effective only at the time of fast decay.(slow is invalid.) high :internal pwm mode motor drive state fet on- >off - >on 4, motor drive motor drive :reset terminal ?h? en terminal ?h? it drives after a mode data setup. motor stop :reset terminal ?l? is stop. reset terminal ?h? en terminal ?l?: it is set to decay by external pwm mode. all fetoff comes after setting current detection. en is not related to ?l or h? in early stages. it fet all turns off till control logic initial setting and the completion of a mode setting. en is always after control logic initial setting and the completion of a mode setting at ?l.?, if it is external pwm slow decay mode, it is start about slow decay. (it fet all turns off at the time of fast decay mode.) after control logic initial setting and the completion of a mode setting, fet is set to being turned on by en ?h? and it is compulsorily set to decay mode by en ?l.? however, even if a setup of external pwm slow decay mode is en ?l?, it is reflected. 5, current detection by decay the conditions which perform current detection by decay internal pwm: sync.rect.enablecontrol1 ?h?, inside of fast decay in mixed decay mode external pwm: sync.rect.enablecontrol1 ?h?, fast decay mode in addition, decay current detection is not performed on conditions. internal pwm: it changes to decay from fet on by the current detection com., fast decay time-offtime starts in this stage. it is start about the current detection in decay, fast decay time as a trigger. detection is stopped after fast decay time completion. when setting decay current is detected during fast decay time, fet is all turned off only within fast decay time. it is referred to as slow decay till off time completion after fast decay completion. external pwm: with en terminal ?l?, it goes into regeneration mode compulsorily. decay current detection is started to a trigger for the signal of en ?l.? detection is continued until the reversal signal from com comes out. decay current detection serves as [en] stop by ?h?, and fet is turned on
M63160J rev.1.1, may.21.2004, page 12 of 17 blank time of out1 out2 & out3 out4 word select0 / 1 of ch2 mode select0 select1 select mode 0 0 out3/4- a 1 0 for test 0 1 out3 /4- b d0 d1 blank time 0 0 4/ f osc 0 1 6/ f osc 1 0 12 / f osc 1 1 24/ f osc internal pmw mode select by out1/2 & out3/4 fixed-off time control of out1 out2 & out3 out4 with d2-d6 toff=(8[1+n]/ f osc)- 1/ f osc where n =0 ? 31 decay mode 0 mixed 1 slow fast decay time control of out1 out2 & out3 out4 with d7-d10 external pmw mode select by out1/2 decay mode 0 fast 1 slow tfd=(8[1+n]/ f osc)- 1/ f osc where n =0 ? 15 sync.rect.control1 of out1 out2 & out3-out4 with d11 phase control by out1/2 phase outa outb 0 reverse low high 1 forward high low sync.rect. function 0 active output turn off when output current leach to zero. 1 passive reversal current bias until vref sett ing value. dac msb bit3 bit2 lsb current ratio(%) 1111 100 1 1 1 0 95.65 1101 91.3 1 1 0 0 86.95 1 0 1 1 82.61 1 0 1 0 78.26 1 0 0 1 73.91 1 0 0 0 69.56 0 1 1 1 60.87 0 1 1 0 52.17 0 1 0 1 43.48 0 1 0 0 34.78 0 0 1 1 26.08 0 0 1 0 17.39 0001 0 0000 disable with d12 sync.rect. f unction 0 disable n o sync.rect. 1 enabled sync.rect. word select0 / 1 of ch1 mode ? itrip=vref current ratio/ ( 5 rsense ) select0 select1 select mode 0 0 out1 1 0 out2 0 1 out1/2
M63160J rev.1.1, may.21.2004, page 13 of 17 motor control functional explanation 1, blank time a mask time setup of the recovery current generated in motor on timing is performed. 2, off time the motor off time after itrip is set up. 3, fast decay time fast decay time in mixed decay mode is set up. (invalid at the time of slow decay and external pwm) 4, sync.rect 4-1, active :fet is all turned off by current zero among decay. 4-2, passive :reverse current is passed to a vref setting value,and fet is all turned off after that. conditions1 :internal pwm ? sync.rect.enablecontrol1 ?h ? ? mixed decay mode state1 :only the inside of fast decay is effective. (when not reaching into fast decay at the above- mentioned setting value,it moves slow decay) conditions2 :external pwm ? sync.rect.enablecontrol1 ?h ? ? fast decay mode 5, sync.rect.enable 5-1, disabled :sync.rect.enablecontrol1 ?l ? decay by the external diode is performed. 5-2, enabled :sync.rect.enablecontrol1 ?h ? decay with an internal transistor is performed. 6, word select the taking- in place of serial data is set up (out1,out2,out1/out2). 7, internal pwm decay is set up. decay mode :mixed /slow mixed decay :fast decay to slow decay 8, external pwm a decay setup at the time of the external control by en terminal decay mode :fast /slow 9, phase control the direction to which current flows is set up. reverse: phase b phase a forward: phase a phase b 10, dac the current which fet passes is set up. itrip is set up.
M63160J rev.1.1, may.21.2004, page 14 of 17 motor control concept figure condition: i nterna l pw m m ixed decay sync.rect.enablecontrol1 ?h? exclk (4m hz) ph ase h bla nk time fast dcay off time current detector rs h en mask phase a hi side nch phase b lo side nch phase b hi side nch phase a lo side nch mask ma sk fast dcay slow dcay mix ed d cay
M63160J rev.1.1, may.21.2004, page 15 of 17 the current detection sequence in decay internal pwm sy nc.rect.enable control1 ? h ? mixed decay h en fast dcay decay current mask under detection off time decay current detection com detection phase a hi side nch phase b lo side nch phase b hi side nch phase a lo side nch fast dcay slow dcay all fet off mixed dcay fast dcay off time en h external pwm sync.rect.enablecon trol1 ? h ? fa st decay fast dcay decay current mask under detection decay current detection com detection phase a hi side nch phase b lo side nch phase b hi side nch phase a lo side nch all fet off
M63160J rev.1.1, may.21.2004, page 16 of 17 external pwm mode external pwm function enable logic (external pwm) en1 out1 en2 out2 0 external 0 external 1 internal 1 internal en1/en2 l->h: motor start(fet on) l=external mode...>fet off(decay) itrip decay (fast or slow) out1/out2 fet off fet off on off off external pwm external pwm internal pwm en1/ en2 motor output current ? h ? ? l ? on off decay or all fet off
M63160J rev.1.1, may.21.2004, page 17 of 17 package outline 44p0x note: please contact renesas technology corporation for further details.
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